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1 typical application features description 76v, 1a step-down regulator the lt c ? 3637 is a high efficiency step-down dc/dc regulator with an internal high side power switch that draws only 12a dc supply current while maintaining a regulated output voltage at no load. the LTC3637 can supply up to 1a load current and features a programmable peak current limit that provides a simple method for optimizing efficiency and for reducing output ripple and component size. the LTC3637s combination of burst mode ? operation, integrated power switch, low quiescent current, and programmable peak current limit provides high efficiency over a broad range of load currents. with its wide input range of 4v to 76v, and programmable overvoltage lockout, the LTC3637 is a robust regulator suited for regulating from a wide variety of power sources. additionally, the LTC3637 includes a precise run threshold and soft-start feature to guarantee that the power system start-up is well-controlled in any environment. the LTC3637 is available in the thermally-enhanced 3mm 5mm dfn and the mse16 packages. efficiency and power loss vs load current applications n wide operating input voltage range: 4v to 76v n internal 350m power mosfet n no compensation required n adjustable 100ma to 1a maximum output current n low dropout operation: 100% duty cycle n low quiescent current: 12a n wide output range: 0.8v to v in n 0.8v 1% feedback voltage reference n precise run pin threshold n internal and external soft-start n programmable 1.8v, 3.3v , 5v or adjustable output n few external components required n programmable input overvoltage lockout n low profile (0.75mm) 3mm 5mm dfn and thermally-enhanced mse16 packages n industrial control supplies n medical devices n distributed power systems n portable instruments n battery-operated devices n automotive n avionics l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. v fb v prg2 sw 10h v in run fbo 47f 2.2f 200k v out 12v 1a v in 12.5v to 76v 3637 ta01a ovlo ss v prg1 i set gnd LTC3637 35.7k 12.5v to 76v input to 12v output, 1a regulator load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3637 ta01b 0 10 1000 100 0 1.0 v in = 24v v in = 48v v in = 76v efficiency power loss v out = 12v 3637f for more information www.linear.com/LTC3637 LTC3637
2 absolute maximum ratings v in supply voltage ..................................... C 0.3v to 80v run voltage ............................................... C0.3v to 80v ss, fbo, i set voltages ................................. C 0.3v to 6v v fb , v prg1 , v prg2 , ovlo voltages .............. C0 .3v to 6v operating junction temperature range (notes 2, 3, 4) ltc 3637e, LTC3637i ......................... C 40c to 125c lt c3637h .......................................... C4 0c to 150c lt c3637mp ....................................... C 55c to 150c (note 1) 1 3 5 6 7 8 sw v in fbo v prg2 v prg1 gnd 16 14 12 11 10 9 gnd run ovlo i set ss v fb top view 17 gnd mse package variation: mse16 (12) 16-lead plastic msop t jmax = 150c, ja = 45c/w, jc = 10c/w exposed pad (pin 17) is gnd, must be soldered to pcb 16 15 14 13 12 11 10 9 17 gnd 1 2 3 4 5 6 7 8 gnd nc run nc ovlo i set ss v fb sw nc v in nc fbo v prg2 v prg1 gnd top view dhc package 16-lead (5mm 3mm) plastic dfn (note 6) t jmax = 150c, ja = 43c/w, jc = 5c/w exposed pad (pin 17) is gnd, must be soldered to pcb pin configuration order information lead free finish tape and reel part marking* package description temperature range LTC3637emse#pbf LTC3637emse#trpbf 3637 16-lead plastic msop C40c to 125c LTC3637imse#pbf LTC3637imse#trpbf 3637 16-lead plastic msop C40c to 125c LTC3637hmse#pbf LTC3637hmse#trpbf 3637 16-lead plastic msop C40c to 150c LTC3637mpmse#pbf LTC3637mpmse#trpbf 3637 16-lead plastic msop C55c to 150c LTC3637edhc#pbf LTC3637edhc#trpbf 3637 16-lead (5mm 3mm) plastic dfn C40c to 125c LTC3637idhc#pbf LTC3637idhc#trpbf 3637 16-lead (5mm 3mm) plastic dfn C40c to 125c LTC3637hdhc#pbf LTC3637hdhc#trpbf 3637 16-lead (5mm 3mm) plastic dfn C40c to 150c LTC3637mpdhc#pbf LTC3637mpdhc#trpbf 3637 16-lead (5mm 3mm) plastic dfn C55c to 150c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ storage temperature range .................. C 65c to 150c lead temperature (soldering, 10 sec) m sop ............................................................... 3 00c 3637f for more information www.linear.com/LTC3637 LTC3637
3 electrical characteristics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = 12v, unless otherwise noted. symbol parameter conditions min typ max units input supply (v in ) v in input voltage operating range 4 76 v v out output voltage operating range 0.8 v in v uvlo v in undervoltage lockout v in rising v in falling hysteresis l l 3.45 3.30 3.65 3.5 150 3.85 3.70 v v mv i q dc supply current (note 5) active mode sleep mode shutdown mode no load run = 0v 165 12 3 350 20 10 a a a run and ovlo pin threshold v oltage rising falling hysteresis 1.17 1.06 1.21 1.10 110 1.25 1.14 v v mv run pin leakage current run = 1.3v C10 0 10 na output supply (v fb ) feedback comparator threshold voltage (adjustable output) v fb rising, v prg1 = v prg2 = 0v LTC3637e, LTC3637i LTC3637h, LTC3637mp l l 0.792 0.788 0.800 0.800 0.808 0.812 v v feedback comparator hysteresis (adjustable output) v fb falling, v prg1 = v prg2 = 0v l 2.5 5 7 mv feedback pin current v fb = 1v, v prg1 = 0v, v prg2 = 0v C10 0 10 na feedback comparator threshold voltages (fixed output) v fb rising, v prg1 = ss, v prg2 = 0v v fb falling, v prg1 = ss, v prg2 = 0v l l 4.940 4.910 5.015 4.985 5.090 5.060 v v v fb rising, v prg1 = 0v, v prg2 = ss v fb falling, v prg1 = 0v, v prg2 = ss l l 3.250 3.230 3.310 3.290 3.370 3.350 v v v fb rising, v prg1 = v prg2 = ss v fb falling, v prg1 = v prg2 = ss l l 1.775 1.765 1.805 1.795 1.835 1.825 v v feedback v oltage line regulation v in = 4v to 76v 0.001 %/v operation peak current comparator threshold i set floating 100k resistor from i set to gnd i set shorted to gnd l l l 2 0.9 0.17 2.4 1.2 0.24 2.8 1.5 0.31 a a a power switch on-resistance i sw = C200ma 0.35 switch pin leakage current v in = 65v, sw = 0v 0.1 1 a soft-start pin pull-up current ss pin < 2.5v 3 5 6 a internal soft-start time ss pin floating 0.8 ms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC3637 is tested under pulsed load conditions such that t j t a . the LTC3637e is guaranteed to meet performance specifications from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LTC3637i is guaranteed over the C40c to 125c operating junction temperature range, the LTC3637h is guaranteed over the C40c to 150c operating junction temperature range and the LTC3637mp is tested and guaranteed over the C55c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125c. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 3: the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ) where ja is 43c/w for the dfn or 45c/w for the msop. 3637f for more information www.linear.com/LTC3637 LTC3637
4 typical performance characteristics efficiency vs input voltage line regulation vs input voltage load regulation vs load current efficiency and power loss vs load current, v out = 5v efficiency and power loss vs load current, v out = 3.3v efficiency and power loss vs load current, v out = 1.8v electrical characteristics note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 4: this ic includes over temperature protection that is intended to protect the device during momentary overload conditions. the maximum rated junction temperature will be exceeded when this protection is active. continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. the overtemperature protection level is not production tested. note 5: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information. note 6: for application concerned with pin creepage and clearance distances at high voltages, the msop package should be used. see applications information. load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3637 g01 0 10 1000 100 0 1.0 v in = 12v v in = 24v v in = 70v efficiency power loss v out = 5v, figure 13 circuit load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3637 g02 0 10 1000 100 0 1.0 v in = 12v v in = 24v v in = 68v efficiency power loss v out = 3.3v figure 13 circuit load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3637 g03 0 10 1000 100 0 1.0 v in = 12v v in = 24v v in = 67v efficiency power loss v out = 1.8v figure 13 circuit input voltage (v) 0 efficiency (%) 80 90 100 30 50 80 3637 g04 70 60 50 10 20 40 60 70 i load = 1a i load = 100ma i load = 10ma i load = 1ma v out = 5v figure 13 circuit input voltage (v) 5 ?0.05 ?v out /v out (%/v) ?0.04 ?0.02 ?0.01 0 0.05 0.02 25 45 55 65 3637 g05 ?0.03 0.03 0.04 0.01 15 35 75 v out = 5v i load = 1a figure 13 circuit load current (ma) 0 100 200 300 400 500 600 700 800 900 output voltage (v) 5.00 5.01 3637 g06 4.99 4.98 1000 5.02 v in = 12v v out = 5v figure 13 circuit 3637f for more information www.linear.com/LTC3637 LTC3637
5 typical performance characteristics peak current trip threshold vs r iset peak current trip threshold vs temperature peak current trip threshold vs input voltage quiescent v in supply current vs input voltage quiescent v in supply current vs temperature uvlo threshold voltages vs temperature feedback comparator trip voltage vs temperature feedback comparator hysteresis vs temperature run and ovlo comparator threshold voltages vs temperature temperature (c) ?55 0.796 feedback comparator trip voltage (v) 0.798 0.800 0.802 0.804 ?25 5 35 65 3637 g07 95 125 155 v in = 12v temperature (c) ?55 4.5 feedback comparator hysteresis (mv) 4.6 4.8 4.9 5.0 5.5 5.2 5 65 95 125 3637 g08 4.7 5.3 5.4 5.1 ?25 35 155 v in = 12v temperature (c) ?55 1.06 run and ovlo comparator threshold (v) 1.08 1.12 1.14 1.16 65 1.24 3637 g09 1.10 5 ?25 95 125 35 155 1.18 1.20 1.22 rising falling r iset (k) 0 0 peak current trip threshold (ma) 800 2000 2400 2800 50 100 3637 g10 400 1600 1200 150 250 200 v in = 12v temperature (c) ?55 0 peak current trip threshold (ma) 400 800 1200 2800 2000 ?25 35 65 155 2400 1600 5 95 125 3637 g11 v in = 12v iset open iset = gnd r iset = 100k input voltage (v) 0 1600 2000 2800 30 50 3637 g12 1200 800 10 20 40 60 70 400 0 2400 peak current trip threshold (ma) iset open iset = 0v r iset = 100k input voltage (v) 5 15 0 v in supply current (a) 8 20 25 45 55 4 16 12 35 65 75 3637 g13 sleep shutdown temperature (c) ?55 v in supply current (a) 20 25 30 35 95 3637 g14 15 10 ?25 5 65 125 155 5 0 v in = 12v sleep shutdown temperature (c) ?55 ?25 3.45 uvlo threshold (v) 3.55 3.70 5 65 95 3.50 3.65 3.60 35 125 155 3637 g15 rising falling 3637f for more information www.linear.com/LTC3637 LTC3637
6 typical performance characteristics load step transient response operating waveforms, v in = 76v short circuit and recovery switch leakage current vs temperature switch on-resistance vs input voltage switch on-resistance vs temperature temperature (c) ?55 ?25 ?15 switch leakage current (a) 5 35 5 65 95 ?5 25 15 35 125 155 3637 g16 v in = 65v sw = 65v sw = 0v input voltage (v) 0 10 0 switch on-resistance () 0.4 1.0 20 40 50 0.2 0.8 0.6 30 60 70 3637 g17 150c ?55c 25c temperature (c) ?55 0.15 switch on-resistnace () 0.25 0.35 0.45 0.55 ?25 5 35 65 3637 g18 95 125 155 v in = 12v output voltage 50mv/div load current 500ma/div 100s/div v in = 12v v out = 5v 5ma to 1a load step figure 13 circuit 3637 g19 output voltage 50mv/div switch voltage 25v/div inductor current 2a/div 10s/div v out = 5v i out = 1a figure 13 circuit 3637 g20 output voltage 2v/div inductor current 1a/div 200s/div v in = 12v v out = 5v i out = 50ma (non short circuit) figure 13 circuit 3637 g21 3637f for more information www.linear.com/LTC3637 LTC3637
7 pin functions sw (pin 1): switch node connection to inductor. this pin connects to the drains of the internal power mosfet switches. nc (pins 2, 4, 13, 15 dhc package only): no internal connection. leave these pins open. v in (pin 3): main input supply pin. a ceramic bypass capacitor should be tied between this pin and gnd. fbo (pin 5): feedback comparator output. the typical pull-up current is 20a. the typical pull- down impedance is 70. see applications information. v prg2 , v prg1 (pins 6, 7): output voltage selection. short both pins to ground for an external resistive divider pro - grammable output voltage. short v prg1 to ss and short v prg2 to ground for a 5v output voltage. short v prg1 to ground and short v prg2 to ss for a 3.3v output voltage. short both pins to ss for a 1.8v output voltage. gnd (pins 8, 16, exposed pad pin 17): ground. the ex - posed backside pad must be soldered to the pcb ground plane for optimal thermal performance. v fb (pin 9): output voltage feedback. when configured for an adjustable output voltage, connect to an external resistive divider to divide the output voltage down for comparison to the 0.8v reference. for the fixed output configuration, directly connect this pin to the output supply. ss (pin 10): soft-start control input. a capacitor to ground at this pin sets the output voltage ramp time. a 50a current initially charges the soft-start capacitor until switching begins, at which time the current is reduced to its nominal value of 5a. the output voltage ramp time from zero to its regulated value is 1ms for every 16.5nf of capacitance from ss to gnd. if left floating, the ramp time defaults to an internal 0.8ms soft-start. i set (pin 11): peak current set input and voltage output ripple filter. a resistor from this pin to ground sets the peak current comparator threshold. leave floating for the maximum peak current (2.4a typical) or short to ground for minimum peak current (0.24a typical). the maximum output current is one-half the peak current. the 5a current that is sourced out of this pin when switching, is reduced to 1a in sleep. optionally, a capacitor can be placed from this pin to gnd to trade off efficiency for light load output voltage ripple. see applications information. ovlo (pin 12): input overvoltage lockout input. connect to the input supply through a resistor divider to set the overvoltage lockout level. a voltage on this pin above 1.21v disables the internal mosfet switch. normal operation resumes when the voltage on this pin decreases below 1.10v. a transient exceeding the ovlo threshold triggers a soft-start reset, resulting in a graceful recovery from an input supply transient. connect this pin to ground to disable the overvoltage lockout. run (pin 14): run control input. a voltage on this pin above 1.21v enables normal operation. forcing this pin below 0.7v shuts down the LTC3637, reducing quiescent current to approximately 3a. optionally, connect to the input supply through a resistor divider to set the under - voltage lockout. 3637f for more information www.linear.com/LTC3637 LTC3637
8 block diagram c out c in v out + ? + ? + 3 ? + ? + + peak current comparator reverse current comparator feedback comparator voltage reference v prg2 gnd gnd ss ss v prg1 gnd ss gnd ss r1 1.0m 4.2m 2.5m 1.0m r2 800k 800k 800k v out adjustable 5v fixed 3.3v fixed 1.8v fixed start-up: 50a normal: 5a *when v in > 5v, intv cc = 5v when v in 5v, intv cc follows v in implement divider externally for adjustable version v in v in 1 sw l1 d1 gnd logic and shoot- through prevention 16 ss r2 r1 intv cc * intv cc * 20a fbo 70 10 5 gnd 8 gnd 17 v fb 9 v prg1 7 v prg2 3637 bd 6 0.800v 1.21v run i set 11 active: 5a sleep: 1a 1.3v 14 ? + ovlo 12 3637f for more information www.linear.com/LTC3637 LTC3637
9 operation the LTC3637 is a step-down dc/dc regulator with an internal high side power switch that uses burst mode control. the low quiescent current and high switching frequency results in high efficiency across a wide range of load currents. burst mode operation functions by us - ing short burst cycles to switch the inductor current through the internal power mosfet, followed by a sleep cycle where the power switch is off and the load current is supplied by the output capacitor. during the sleep cycle, the LTC3637 draws only 12a of supply current. at light loads, the burst cycles are a small percentage of the total cycle time which minimizes the average supply current, greatly improving efficiency. figure 1 shows an example of burst mode operation. the switching frequency and the number of switching cycles during burst mode operation are dependent on the inductor value, peak current, load current, input voltage and output voltage. reducing the v in pin supply current to only 12a. as the load current discharges the output capacitor, the voltage on the v fb pin decreases. when this voltage falls 5mv below the 800mv reference, the feedback comparator trips and enables burst cycles. at the beginning of the burst cycle, the internal high side power switch (p-channel mosfet) is turned on and the inductor current begins to ramp up. the inductor current increases until either the current exceeds the peak current comparator threshold or the voltage on the v fb pin exceeds 800mv, at which time the high side power switch is turned off and the external catch diode turns on. the inductor current ramps down until the reverse current compara - tor trips, signaling that the current is close to zero. if the voltage on the v fb pin is still less than the 800mv refer - ence, the high side power switch is turned on again and another cycle commences. the average current during a burst cycle will normally be greater than the average load current. for this ar chitecture, the maximum average output current is equal to half of the peak current. the hysteretic nature of this control architecture results in a switching frequency that is a function of the input voltage, output voltage, and inductor value. this behavior provides inherent short-circuit protection. if the output is shorted to ground, the inductor current will decay very slowly during a single switching cycle. since the high side switch turns on only when the inductor current is near zero, the LTC3637 inherently switches at a lower frequency during start-up or short-circuit conditions. start-up and shutdown if the voltage on the run pin is less than 0.7v, the LTC3637 enters a shutdown mode in which all internal circuitry is disabled, reducing the dc supply current to 3a. when the voltage on the run pin exceeds 1.21v, normal operation of the main control loop is enabled. the run pin com - parator has 110mv of internal hysteresis, and therefore must fall below 1.1v to stop switching and disable the main control loop. an internal 0.8ms soft-start function limits the ramp rate of the output voltage on start-up to prevent excessive input supply droop. if a longer ramp time and consequently less supply droop is desired, a capacitor can be placed from burst frequency inductor current output voltage ?v out 3637 f01 burst cycle sleep cycle switching frequency figure 1. burst mode operation main control loop the LTC3637 uses the v prg1 and v prg2 control pins to connect internal feedback resistors to the v fb pin. this enables fixed outputs of 1.8v, 3.3v or 5v without increas - ing component count, input supply current or exposure to noise on the sensitive input to the feedback comparator . external feedback resistors (adjustable mode) can still be used by connecting both v prg1 and v prg2 to ground. in adjustable mode the feedback comparator monitors the voltage on the v fb pin and compares it to an inter - nal 800mv reference. if this voltage is greater than the reference, the comparator activates a sleep mode in which the power switch and current comparators are disabled, (refer to block diagram) 3637f for more information www.linear.com/LTC3637 LTC3637
10 the ss pin to ground. the 5a current that is sourced out of this pin will create a smooth voltage ramp on the capacitor. if this ramp rate is slower than the internal 0.8ms soft-start, then the output voltage will be limited by the ramp rate on the ss pin instead. the internal and external soft-start functions are reset on start-up and after an undervoltage or overvoltage event on the input supply. the peak inductor current is not limited by the internal or external soft-start functions; however, placing a capacitor from the i set pin to ground does provide this capability. peak inductor current programming the peak current comparator nominally limits the peak inductor current to 2.4a. this peak inductor current can be adjusted by placing a resistor from the i set pin to ground. the 5a current sourced out of this pin through the resistor generates a voltage that adjusts the peak cur - rent comparator threshold. during sleep mode, the current sourced out of the i set pin is reduced to 1a. the i set current is increased back to 5a on the first switching cycle after exiting sleep mode. the i set current reduction in sleep mode, along with adding a filtering capacitor, c iset , from the i set pin to ground, provides a method of reducing light load output voltage ripple at the expense of lower efficiency and slightly de - graded load step transient response. for applications requiring higher output current, the l tc3637 provides a feedback comparator output pin (fbo) for combining the output current of multiple LTC3637s. by connecting the fbo pin of a master LTC3637 to the v fb pin of one or more slave LTC3637s, the output currents can be combined to source much more than 1a. dropout operation when the input supply decreases toward the output sup - ply, the duty cycle increases to maintain regulation. the p-channel mosfet top switch in the l tc3637 allows the duty cycle to increase all the way to 100%. at 100% duty cycle, the p-channel mosfet stays on continuously , providing output current equal to the peak current, which can be greater than 2a. the power dissipation of the l tc3637 can increase dramatically during dropout opera - tion especially at input voltages less than 10v . the increased operation power dissipation is due to higher potential output current and increased p-channel mosfet on-resistance. see the thermal considerations section of the applications information for a detailed example. input voltage and overtemperature protection when using the LTC3637, care must be taken not to exceed any of the ratings specified in the absolute maxi - mum ratings section. as an added safeguard, however, the l tc3637 incorporates an overtemperature shutdown feature. if the junction temperature reaches approximately 180c, the l tc3637 will enter thermal shutdown mode. both power switches will be turned off and the sw node will become high impedance. after the part has cooled below 160c, it will restart. the overtemperature level is not production tested. the LTC3637 additionally implements protection features which inhibit switching when the input voltage is not within a programmed operating range. by using a resistive di - vider from the input supply to ground, the run and ovlo pins can ser ve as a precise input supply voltage monitor . switching is disabled when either the run pin falls below 1.1v or the ovlo pin rises above 1.21v, which can be configured to limit switching to a specific range of input supply voltage. pulling the run pin below 700mv forces a low quiescent current shutdown (3a). furthermore, if the input voltage falls below 3.5v typical (3.7v maximum), an internal undervoltage detector disables switching. when switching is disabled, the LTC3637 can safely sustain input voltages up to the absolute maximum rating of 80v. input supply undervoltage or overvoltage events trigger a soft-start reset, which results in a graceful recovery from an input supply transient. high input voltage considerations when operating with an input voltage to output voltage dif - ferential of more than 65v, a minimum output load current of 10ma is required to maintain a well-regulated output voltage under all operating conditions, including shutdown mode. if this 10ma minimum load is not available, then the minimum output voltage that can be maintained by the LTC3637 is limited to v in C 65v. (refer to block diagram) 3637f for more information www.linear.com/LTC3637 LTC3637
11 applications information the basic LTC3637 application circuit is shown on the front page of the data sheet. external component selection is determined by the maximum load current requirement and begins with the selection of the peak current programming resistor, r iset . the inductor value l can then be determined, followed by capacitors c in and c out . peak current resistor selection the peak current comparator has a guaranteed peak current limit of 2a (2.4a typical), which guarantees a maximum average load current of 1a. for applications that demand less current, the peak current threshold can be reduced to as little as 200ma (240ma typical). this lower peak current allows the use of lower value, smaller components (input capacitor, output capacitor, and inductor), resulting in lower supply ripple and a smaller overall dc/dc regulator. the threshold can be easily programmed using a resis - tor (r iset ) between the i set pin and ground. the voltage generated on the i set pin by r iset and the internal 5a current source sets the peak current. the voltage on the i set pin is internally limited within the range of 0.1v to 1.0v. the value of resistor for a particular peak current can be selected by using figure 2 or the following equation: r iset = 140k ? i peak C 24k where 200ma < i peak < 2a. the internal 5a current source is reduced to 1a in sleep mode to maximize efficiency and to facilitate a trade-off between efficiency and light load output voltage ripple, as described in the optimizing output voltage ripple section of the applications information. for maximum efficiency, minimize the capacitance on the i set pin and place the r iset resistor as close to the pin as possible. the typical peak current is internally limited to be within the range of 240ma to 2.4a. shorting the i set pin to ground programs the current limit to 240ma, and leaving it float sets the current limit to the maximum value of 2.4a. when selecting this resistor value, be aware that the maximum average output current for this architecture is limited to half of the peak current. therefore, be sure to select a value that sets the peak current with enough margin to provide adequate load current under all conditions. selecting the peak current to be 2.2 times greater than the maximum load current is a good starting point for most applications. inductor selection the inductor, input voltage, output voltage, and peak cur - rent determine the switching frequency during a burst cycle of the LTC3637. for a given input voltage, output voltage, and peak current, the inductor value sets the switching frequency during a burst cycle when the output is in regulation. generally, switching between 50khz and 250khz yields high efficiency, and 200khz is a good first choice for many applications. the inductor value can be determined by the following equation: l = v out f ?i peak ? ? ? ? ? ? ? 1C v out v in ? ? ? ? ? ? the variation in switching frequency during a burst cycle with input voltage and inductance is shown in figure 3. for lower values of i peak , multiply the frequency in figure?3 by 2.4a/i peak . an additional constraint on the inductor value is the LTC3637s 150ns minimum on-time of the high side switch. therefore, in order to keep the current in the inductor well-controlled, the inductor value must be chosen so that it is larger than a minimum value which can be computed figure 2. r iset selection maximum load current (ma) r iset (k) 60 180 200 260 220 240 600 3637 f02 20 140 100 40 160 0 120 80 0 200 400 800 1000 3637f for more information www.linear.com/LTC3637 LTC3637
12 applications information as follows: l > v in(max) ? t on(min) i peak ? 1.2 where v in(max) is the maximum input supply voltage when switching is enabled, t on(min) is 150ns, i peak is the peak current, and the factor of 1.2 accounts for typical inductor tolerance and variation over temperature. for applications that have large input supply transients, the ovlo pin can be used to disable switching above the maximum operat - ing voltage, v in(max) , so that the minimum inductor value is not artificially limited by a transient condition. inductor values that violate the above equation will cause the peak current to overshoot and permanent damage to the part may occur. although the above equation provides the minimum in - ductor value, higher efficiency is generally achieved with a larger inductor value, which produces a lower switching frequency. for a given inductor type, however, as inductance is increased, dc resistance (dcr) also increases. higher dcr translates into higher copper losses and lower current rating, both of which place an upper limit on the inductance. the recommended range of inductor values for small sur - face mount inductors as a function of peak current is shown in figure 4. the values in this range are a good compromise between the trade-offs discussed above. for applications where board area is not a limiting factor , inductors with l arger cores can be used, which extends the recommended range of figure?4 to larger values. inductor core selection once the value for l is known, the type of inductor must be selected. high efficiency regulators generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of the more expensive ferrite cores. actual core loss is independent of core size for a fixed inductor value but is very dependent of the inductance selected. as the inductance increases, core losses decrease. un - fortunately, increased inductance requires more turns of wire and therefore copper losses will increase. ferrite designs have ver y low core losses and are pre - ferred at high switching frequencies, so design goals can concentrate on copper loss and preventing satura - tion. ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequently output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy but generally cost more than powdered iron core inductors with similar charac - teristics. the choice of which style inductor to use mainly depends on the price versus size requirements and any figure 4. recommended inductor values for maximum efficiency figure 3. switching frequency for v out = 5.0v v in input voltage (v) 0 switching frequency (khz) 200 300 7060 3637 f03 100 0 10 20 30 40 50 v out = 5.0v i set open l = 5.6h l = 10h l = 22h l = 47h peak inductor current (ma) 100 1 inductor value (h) 10 100 1000 1000 3637 f04 3637f for more information www.linear.com/LTC3637 LTC3637
13 applications information radiated field/emi requirements. new designs for surface mount inductors are available from wrth, coilcraft, tdk, toko, and sumida. c in and c out selection the input capacitor, c in , is needed to filter the trapezoidal current at the source of the top high side mosfet. c in should be sized to provide the energy required to charge the inductor without causing a large decrease in input voltage ( ?v in ). the relationship between c in and ?v in is given by: c in > l ?i peak 2 2 ? v in ? ? v in it is recommended to use a larger value for c in than calculated by the above equation since capacitance de- creases with applied voltage. in general, a 4.7f x7r ceramic capacitor is a good choice for c in in most LTC3637 applications. t o minimize large ripple voltage, a low esr input capaci - tor sized for the maximum rms current should be used. rms current is given by: i rms = i out(max) ? v out v in ? v in v out C 1 this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based only on 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the output capacitor, c out , filters the inductors ripple current and stores energy to satisfy the load current when the LTC3637 is in sleep. the output ripple has a lower limit of v out /160 due to the 5mv typical hysteresis of the feed - back comparator. the time delay of the comparator adds an additional ripple voltage that is a function of the load current. during this delay time, the LTC3637 continues to switch and supply current to the output. the output ripple can be approximated by: ? v out i peak 2 C i load ? ? ? ? ? ? ? 4 ? 10 C6 c out + v out 160 the output ripple is a maximum at no load and approaches lower limit of v out /160 at full load. choose the output capacitor c out to limit the output voltage ripple ?v out using the following equation: c out i peak ? 2 ? 10 C6 ? v out C v out 160 the value of the output capacitor must be large enough to accept the energy stored in the inductor without a large change in output voltage during a single switching cycle. setting this voltage step equal to 1% of the output voltage, the output capacitor must be: c out > 50 ? l ? i peak v out ? ? ? ? ? ? 2 typically, a capacitor that satisfies the voltage ripple re - quirement is adequate to filter the inductor ripple. to avoid overheating, the output capacitor must also be sized to handle the ripple current generated by the inductor . the worst-case ripple current in the output capacitor is given by i rms = i peak /2. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important only to use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long- term reliability. ceramic capacitors have excellent low esr characteristics but can have high voltage coefficient and audible piezoelectric effects. the high quality factor (q) of ceramic capacitors in series with trace inductance can 3637f for more information www.linear.com/LTC3637 LTC3637
14 applications information also lead to significant input voltage ringing. input voltage steps if the input voltage falls below the regulated output volt - age, the body diode of the internal high side mosfet will conduct current from the output supply to the input sup - ply. if the input voltage falls rapidly, the voltage across the inductor will be significant and may saturate the inductor . a large current will then flow through the high side mosfet body diode, resulting in excessive power dissipation that may damage the part. if rapid voltage steps are expected on the input supply, put a small silicon or schottky diode in series with the v in pin to prevent reverse current and inductor saturation, shown below as d2 in figure 5. the diode should be sized for a reverse voltage of greater than the input voltage, and to withstand repetitive currents higher than the maximum peak current of the LTC3637. with a series resistor may be required in parallel with c in to dampen the ringing of the input supply. figure 6 shows this circuit and the typical values required to dampen the ringing. ceramic capacitors are also piezoelectric sensitive. the LTC3637s burst frequency depends on the load current, and in some applications at light load the LTC3637 can excite the ceramic capacitor at audio frequencies, gen - erating audible noise. if the noise is unacceptable, use a high per formance tantalum or electrolytic capacitor at the output. r = l in c in 4 ? c in c in l in 3637 f05 v in LTC3637 figure 6. series rc to reduce v in ringing sw input supply LTC3637 c out 3637 f05 c in v out v in l d2 figure 5. preventing current flow to the input ceramic capacitors and audible noise higher value, lower cost ceramic capacitors are now be- coming available in smaller case sizes. their high ripple current, high voltage rating, and low esr make them ideal for switching regulator applications. however , care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. for application with inductive source impedance, such as a long wire, an electrolytic capacitor or a ceramic capacitor output voltage programming the LTC3637 has three fixed output voltage modes that can be selected with the v prg1 and v prg2 pins and an adjustable mode. the fixed output modes use an internal feedback divider which enables higher efficiency, higher noise immunity, and lower output voltage ripple for 5v, 3.3v and 1.8v applications. to select the fixed 5v output voltage, connect v prg1 to ss and v prg2 to gnd. for 3.3v, connect v prg1 to gnd and v prg2 to ss. for 1.8v, connect both v prg1 and v prg2 to ss. for any of the fixed output voltage options, directly connect the v fb pin to v out . for the adjustable output mode (v prg1 = 0v, v prg2 = 0v), the output voltage is set by an external resistive divider according to the following equation: v out = 0.8v ? 1 + r1 r2 ? ? ? ? ? ? the resistive divider allows the v fb pin to sense a fraction of the output voltage as shown in figure 7. the output voltage can range from 0.8v to v in . be careful to keep the divider resistors very close to the v fb pin to minimize the trace length and noise pick-up on the sensitive v fb signal. 3637f for more information www.linear.com/LTC3637 LTC3637
15 applications information to minimize the no-load supply current, resistor values in the megohm range may be used; however, large resistor values should be used with caution. the feedback divider is the only load current when in shutdown. if pcb leakage current to the output node or switch node exceeds the load current, the output voltage will be pulled up. in normal operation, this is generally a minor concern since the load current is much greater than the leakage. to avoid excessively large values of r1 in high output volt - age applications (v out 10v), a combination of external and internal resistors can be used to set the output volt - age. this has an additional benefit of increasing the noise immunity on the v fb pin. figure 8 shows the LTC3637 with the v fb pin configured for a 5v fixed output with an external divider to generate a higher output voltage. the internal 5m resistance appears in parallel with r2, and the value of r2 must be adjusted accordingly. r2 should be chosen to be less than 200k to keep the output voltage variation less than 1% due to the tolerance of the LTC3637s internal resistor. run pin and external input overvoltage/undervoltage lockout the run pin has two different threshold voltage levels. pulling the run pin below 0.7v puts the LTC3637 into a low quiescent current shutdown mode (i q ~ 3a). when the run pin is greater than 1.21v, the controller is enabled. figure 9 shows examples of configurations for driving the run pin from logic. the run and ovlo pins can alternatively be configured as precise undervoltage (uvlo) and overvoltage (ovlo) lockouts on the v in supply with a resistive divider from v in to ground. a simple resistive divider can be used as shown in figure 10 to meet specific v in voltage requirements. the current that flows through the r3-r4-r5 divider will directly add to the shutdown, sleep, and active current of the LTC3637, and care should be taken to minimize the impact of this current on the overall efficiency of the ap - plication circuit. resistor values in the megohm range may be required to keep the impact on quiescent shutdown and sleep currents low . t o pick resistor values, the sum total of r3 + r4 + r5 (r total ) should be chosen first based on the allowable dc current that can be drawn from v in . the v fb v out r2 3637 f06 0.8v r1 v prg1 v prg2 LTC3637 figure 7. setting the output voltage with external resistors 4.2m r1 5v r2 3637 f08 v out 800k 0.8v v fb ss v prg1 v prg2 LTC3637 figure 8. setting the output voltage with external and internal resistors run supply LTC3637 run 3637 f09 LTC3637 v in figure 9. run pin interface to logic figure 10. adjustable uv and ov lockout run r3 ovlo 3637 f10 LTC3637 v in r4 r5 3637f for more information www.linear.com/LTC3637 LTC3637
16 applications information individual values of r3, r4 and r5 can then be calculated from the following equations: r5 = r total ? 1.21v rising v in ovlo threshold r4 = r total ? 1.21v rising v in uvlo threshold Cr5 r3 = r total Cr5 Cr4 for applications that do not need a precise external ovlo, the ovlo pin can be tied directly to ground. the run pin in this type of application can be used as an external uvlo using the above equations with r5 = 0. similarly, for applications that do not require a precise uvlo, the run pin can be tied to v in . in this configuration, the uvlo threshold is limited to the internal v in uvlo thresholds as shown in the electrical characteristics table. the resistor values for the ovlo can be computed using the above equations with r3 = 0. be aware that the ovlo pin cannot be allowed to exceed its absolute maximum rating of 6v. to keep the voltage on the ovlo pin from exceeding 6v, the following relation should be satisfied: v in(max) ? r5 r3 + r4 + r5 ? ? ? ? ? ? < 6v catch diode selection the catch diode d1 conducts current only during switch-off time. use a schottky diode to limit forward voltage drop to increase efficiency. the schottky diode must have a peak reverse voltage that is equal to the regulator maximum input voltage or ovlo set voltage and must be sized for average forward current in normal operation. average forward current can be calculated from: i d(avg) = i out ? v in v in C v out ( ) an additional consideration is reverse leakage current. when the catch diode is reversed biased, any leakage current will appear as load current. when operating under light load conditions, the low supply current consumed by the LTC3637 will be optimized by using a catch diode with minimum reverse leakage current. low leakage schottky diodes often have larger forward voltage drops at a given current, so a trade-off can exist between low load and high load efficiency. often schottky diodes with larger reverse bias ratings will have less leakage at a given output voltage than a diode with a smaller reverse bias rating. therefore, superior leakage performance can be achieved at the expense of diode size. soft-start soft-start is implemented by ramping the effective refer - ence voltage from 0v to 0.8v. to increase the duration of soft-start, place a capacitor from the ss pin to ground. an internal 5a pull-up current will charge this capacitor. the value of the soft-start capacitor can be calculated by the following equation: c ss = soft-start time ? 5a 0.35v the minimum soft-start time is limited to the internal soft- start timer of 0.8ms. when the LTC3637 detects a fault condition (input supply undervoltage or overtemperature) or when the run pin falls below 1.1v, or when the ovlo pin rises above 1.21v, the ss pin is quickly pulled to ground and the internal soft-start timer is reset. this ensures an orderly restart when using an external soft-start capacitor. note that the soft-start capacitor may not be the limiting factor in the output voltage ramp. the maximum output current, which is equal to half the peak current, must charge the output capacitor from 0v to its regulated value. for small peak currents or large output capacitors, this ramp time can be significant. therefore, the output voltage ramp time from 0v to the regulated v out value is limited to a minimum of: ramp time 2 ? c out i peak v out optimizing output voltage ripple once the peak current resistor, r iset , and inductor are se- lected to meet the load current and frequency requirements, an optional capacitor , c iset , can be added in parallel with 3637f for more information www.linear.com/LTC3637 LTC3637
17 applications information r iset . this will boost efficiency at mid-loads and reduce the output voltage ripple dependency on load current at the expense of slightly degraded load step transient response. the peak inductor current is controlled by the voltage on the i set pin. current out of the i set pin is 5a while the LTC3637 is switching and is reduced to 1a during sleep mode. the i set current will return to 5a on the first cycle after sleep mode. placing a parallel rc from the i set pin to ground filters the i set voltage as the LTC3637 enters and exits sleep mode which in turn will affect the output volt - age ripple, efficiency and load step transient performance. in ge neral, when r iset is greater than 120k a c iset capacitor in the 47pf to 100pf range will improve most performance parameters. when r iset is less than 100k, the capacitance on the i set pin should be minimized. efficiency considerations the efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percent - age of input power . although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: v in operating current and i 2 r losses. the v in operating current dominates the efficiency loss at very low load currents whereas the i 2 r loss dominates the efficiency loss at medium to high load currents. 1. the v in operating current comprises two components: the dc supply current as given in the electrical charac - teristics and the internal mosfet gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, ? q, moves from v in to ground. the resulting ?q/dt is the current out of v in that is typically larger than the dc bias current. 2. i 2 r losses are calculated from the resistances of the internal switches, r sw and external inductor r l . when switching, the average output current flowing through the inductor is chopped between the high side pmos switch and the external catch diode. thus, the series resistance looking back into the switch pin is a function of the top and bottom switch r ds(on) values and the duty cycle (dc = v out /v in ) as follows: r sw = (r ds(on)top )dc + (r ds(on)bot ) ? (1 C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteris - tics curves. thus, to obtain the i 2 r losses, simply add r sw to r l and multiply the result by the square of the average output current: i 2 r loss = i o 2 (r sw + r l ) other losses, including c in and c out esr dissipative losses and inductor core losses, generally account for less than 2% of the total power loss. thermal considerations in most applications, the LTC3637 does not dissipate much heat due to its high efficiency. but, in applications where the LTC3637 is running at high ambient temperature with low supply voltage and high duty cycles, such as dropout, the heat dissipated may exceed the maximum junction temperature of the part. to prevent the LTC3637 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. the temperature rise from ambient to junction is given by: t r = p d ? ja where p d is the power dissipated by the regulator and ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature is given by: t j = t a + t r 3637f for more information www.linear.com/LTC3637 LTC3637
18 applications information generally, the worst-case power dissipation is in dropout at low input voltage. in dropout, the LTC3637 can provide a dc current as high as the full 2.4a peak current to the output. at low input voltage, this current flows through a higher resistance mosfet, which dissipates more power. as an example, consider the LTC3637 in dropout at an input voltage of 5v, a load current of 1a and an ambient temperature of 85c. from the typical performance graphs of switch on-resistance, the r ds(on) of the top switch at v in = 5v and 100c is approximately 0.6. therefore, the power dissipated by the part is: p d = (i load ) 2 ? r ds(on) = (1a) 2 ? 0.6 = 0.6w for the msop package the ja is 45c/w. thus, the junc - tion temperature of the regulator is: t j = 85 c + 0.6w ? 45 c w = 112 c which is below the maximum junction temperature of 150c. note that the while the LTC3637 is in dropout, it can provide output current that is equal to the peak current of the part. this can increase the chip power dissipation dramatically and may cause the internal overtemperature protection circuitry to trigger at 180c and shut down the LTC3637. design example as a design example, consider using the LTC3637 in an application with the following specifications: v in = 24v, v in(max) = 80v, v out = 3.3v, i out = 1a, f = 200khz. fur - thermore, assume for this example that switching should start when v in is greater than 6v and stop switching when v in is greater than 48v. first, calculate the inductor value that gives the required switching frequency: l = 3.3v 200khz ? 2.4a ? ? ? ? ? ? ? 1C 3.3v 24v ? ? ? ? ? ? ? 4.7h next, verify that this value meets the l min requirement. for this input voltage and peak current, the minimum inductor value is: l min = 48v ? 150ns 2.4a ? 4h therefore, the minimum inductor requirement is satisfied and the 4.7h inductor value may be used. next, c in and c out are selected. for this design, c in should be sized for a current rating of at least: i rms = 1a ? 3.3v 24v ? 24v 3.3v C 1 ? 350ma rms the value of c in is selected to keep the input from droop - ing less than 240mv (1%): c in > 4.7h ? 2.4a 2 2 ? 24v ? 240mv ? 2.2f c out will be selected based on a value large enough to satisfy the output voltage ripple requirement. for a 50mv output ripple, the value of the output capacitor can be calculated from: c out > 4.7h ? 2.4a 2 2 ? 3.3v ? 50mv ? 100f c out also needs an esr that will satisfy the output voltage ripple requirement. the required esr can be calculated from: esr < 50mv 2.4a ? 20m ? a 100f ceramic capacitor has significantly less esr than 20m. since an output voltage of 3.3v is one of the standard output configurations, the LTC3637 can be configured by connecting v prg1 to ground and v prg2 to the ss pin. the undervoltage and overvoltage lockout requirements on v in can be satisfied with a resistive divider from v in to the run and ovlo pins (refer to figure 9). pick r total = 1m = r3 + r4 + r5 to minimize the loading on v in and calculate r3, r4 and r5 as follows (standard values): r5 = 1m ? 1.21v 48v = 24.9k r4 = 1m ? 1.21v 6v C 24.9k = 174k r3 = 1m ? 24.9k C174k = 806k 3637f for more information www.linear.com/LTC3637 LTC3637
19 applications information note that the v in falling thresholds for both uvlo and ovlo will be 10% less than the rising thresholds or 5.4v and 43v respectively. the absolute maximum rating on the ovlo pin (6v) is not violated based on the following: ovlo(max) = 80v ? 24.9k 806k + 174k + 24.9k ( ) = 2v the i set pin should be left open in this example to select maximum peak current (2.4a typical). figure 11 shows a complete schematic for this design example. v fb sw 4.7h v in run 806k ovlo 174k 24.9k 2.2f 100f v out 3.3v 1a v in 24v 3637 f11 ss v prg2 v prg1 fbo i set gnd LTC3637 figure 11. 24v to 3.3v, 1a regulator at 200khz figure 12. example pcb layout pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3637. check the following in your layout: 1. large switched currents flow in the power switches and input capacitor. the loop formed by these compo - nents should be as small as possible. a ground plane is recommended to minimize ground impedance. 2. connect the (+) terminal of the input capacitor, c in , as close as possible to the v in pin. this capacitor provides the ac current into the internal power mosfets. 3. keep the switching node, sw, away from all sensitive small signal nodes. the rapid transitions on the switching node can couple to high impedance nodes, in particular v fb , and create increased output ripple. 4. flood all unused area on all layers with copper except for the area under the inductor. flooding with copper will reduce the temperature rise of power components. y ou can connect the copper areas to any dc net (v in , v out , gnd, or any other dc rail in your system). v fb i set sw l1 v in run r3 r1 d1 r2 c in c out v out v in r4 ovlo r5 r iset c iset c ss fbo ss v prg2 v prg1 LTC3637 l1 c out c in vias to ground plane 3637 f12 d1 pin clearance/creepage considerations the LTC3637 is available in two packages (mse16 and dhc) both with identical functionality. however, the 0.2mm (minimum space) between pins and paddle on the dhc package may not provide sufficient pc board trace clear - ance between high and low voltage pins in some higher voltage applications. in applications where clearance is required, the mse16 package should be used. the mse16 package has removed pins between all the adjacent high voltage and low voltage pins, providing 0.657mm clear - ance which will be sufficient for most applications. for more information, refer to the printed cir cuit board design standards described in ipc-2221 (www .ipc.org). 3637f for more information www.linear.com/LTC3637 LTC3637
20 typical applications figure 13. 5v-76v input to 5v output, 1a regulator with soft-start soft-start waveform v fb ss sw l1 10h v in run fbo i set c out 100f 2 c in 4.7f d1 c iset 47pf c ss 150nf r iset 255k c in : tdk c5750x7r2a-475m c out : 2 murata grm32er61a107me20l d1: diodes inc. sbr3u100lp l1: sumida cdrh105r-100 v out 5v 1a v in 5v to 76v 3637 f13 v prg1 v prg2 ovlo gnd LTC3637 output voltage 1v/div 2ms/div 3637 f13b v fb i set sw l1 10h v in run fbo c out 10f c in 2.2f r1 200k d1 c in : tdk cga6n3x7r2a225m c out : taiyo yuden umk325bj106mm d1: diodes inc. es2ba-13-f l1: tdk slf10145t-100m v out 36v 1a v in 36.5v to 76v 3637 ta02a ovlo ss v prg1 v prg2 gnd LTC3637 r2 32.4k output voltage 1v/div ac-coupled sw voltage 50v/div inductor current 2a/div 5s/div v in = 76v v out = 36v i out = 1a 3637 ta02b 36.5v to 76v input to 36v output, 1a regulator 4v to 64v input to C12v output positive-to-negative regulator maximum load current vs input voltage v fb sw l1 4.7h v in run i set fbo ovlo c out 22f r1 200k d1 c in 2.2f c in : kemet c1210c225m1rac c out : avx 1210yc226mat d1: avx sd3220s100s5r0 l1: cooper bussmann dr7-4r7-r v out ?12v v in 4v to 63v 3637 ta03a ss v prg1 v prg2 gnd LTC3637 r2 147k input voltage (v) 0 0 maximum load current (ma) 200 400 600 800 1000 10 20 30 40 3637 ta03b 50 60 v out = ?12v maximum load current v in v in + | v out | ? i peak 2 3637f for more information www.linear.com/LTC3637 LTC3637
21 typical applications 24.5v to 76v input to 24v output with 350ma input current limit 24.5v to 76v input to 24v output with 350ma input current limit 4v to 76v input to 15v output* clamp, 1a high efficiency surge stopper 4v to 76v input to 1.8v supercap charger maximum input and load current vs input voltage maximum input and load current vs input voltage v fb ovlo sw l1 22h v in run i set c out 10f c in 1f r1 200k d1 c in : taiyo yuden hmk325b7105mn c out : tdk c3225x7r1h106m d1: diodes inc. sbr3u100lp l1: wrth 7447714220 v out 24v v in 24.5v to 76v 3637 ta04a fbo ss v prg1 v prg2 gnd LTC3637 r2 53.6k r3 806k r4 11.5k input voltage (v) 25 maximum current (ma) 600 800 1000 65 3637 ta04b 400 200 500 700 900 300 100 0 35 45 55 75 maximum output current maximum input current input current limit v out r4 r3 + r4 maximum load current v in 2 r4 r3 + r4 v fb sw l1 6.8h v in run fb0 i set r1 200k d1 c out : tdk c3225x7r1c226m d1: vishay 10mq100npbf l1: visahy ihlp-2525cz-01 *when v in > 15v, LTC3637 switches and v out is regulated to 15v; when v in 15v, LTC3637 operates in dropout and v out follows v in v in * 4v to 76v ovlo ss v prg1 v prg2 gnd LTC3637 r2 27.4k 3637 ta05a c out 22f v out * 1a v in 20v/div v out 20v/div 100ms/div i load = 1a 3637 ta05b 76v input surge 15v output clamp sw v in 4v to 76v LTC3637 l1 6.2h c out 100f 2 c sc 1f 3637 ta06 v out 1.8v c out : tdk c3225x5r0j107m c sc : cooper bussmann m0810-2r5105-r d1: vishay vssa310s-e3 d2: vishay 10mdq100npbf l1: wrth 744 066 0062 gnd v fb ss v prg1 run d1 d2 i set fbo v prg2 ovlo v in run 2v/div run 2v/div v out 500mv/div v out 500mv/div inductor current 2a/div inductor current 2a/div zoom 100ms/div 200s/div 3637 ta05b 3637 ta05c v in = 48v v in = 48v 3637f for more information www.linear.com/LTC3637 LTC3637
22 package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (mse16(12)) 0213 rev d 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1.0 (.039) bsc 1.0 (.039) bsc 16 16 14 121110 1 3 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package variation: mse16 (12) 16-lead plastic msop with 4 pins removed exposed die pad (reference ltc dwg # 05-08-1871 rev d) 3637f for more information www.linear.com/LTC3637 LTC3637
23 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1 notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 package outline 0.25 0.05 dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706 rev ?) 3637f for more information www.linear.com/LTC3637 LTC3637
24 ? linear technology corporation 2013 lt 1213 ? printed in usa (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTC3637 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 part number description comments ltc3639 150v, 100ma synchronous step-down regulator v in : 4v to 150v, v out(min) = 0.8v, i q = 12a, i sd = 1.4a, msop-16(12)e l tc3630a 76v , 500ma synchronous step-down dc/dc converter v in : 4v to 76v, v out(min) = 0.8v, i q = 12a, i sd = 3a, 3 5 dfn-16, msop-16(12)e l tc3642 45v (t ransient to 60v) 50ma synchronous step-down dc/dc converter v in : 4.5v to 45v, v out(min) = 0.8v, i q = 12a, i sd = 3a, 3 3 dfn-8, msop-8 l tc3631 45v (t ransient to 60v) 100ma synchronous step-down dc/dc converter v in : 4.5v to 45v, v out(min) = 0.8v, i q = 12a, i sd = 3a, 3 3 dfn-8, msop-8 l tc3632 50v (t ransient to 60v) 20ma synchronous step-down dc/dc converter v in : 4.5v to 50v, v out(min) = 0.8v, i q = 12a, i sd = 3a, 3 3 dfn-8, msop-8 lt ? 3990 62v, 350ma, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in : 4.2v to 62v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3 3 dfn-10, msop-16e l tc3891 low i q , 60v synchronous step-down regulator v in : 4v to 60v, v out(min) = 0.8v, i q = 50a, i sd = 14a, 3 4 qfn-20, tssop-20e related parts typical application 5.5v to 76v input to 5v output, 1a step-down regulator efficiency vs load current sw v in 5.5v to 76v LTC3637 l1 5.2h c out 47f c in : tdk cga6n3x7r2a225k c out : murata gcm32er70j476ke19l d1: vishay ss2h10 l1: coilcraft mss1038t-522 3637 ta07a c in 2.2f v out 5v 1a gnd v fb ss v prg1 run d1 v prg2 ovlo i set fbo v in load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3637 ta07b 0 1 v in = 12v v in = 24v v in = 70v v out = 5v 3637f for more information www.linear.com/LTC3637 LTC3637

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